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T73LVP20 Datasheet

  • T73LVP20

  • 3.3V LVTTL/LVCMOS-to-Differential LVPECL Translator

  • 5頁

  • ETC

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Preliminary Information
T73LVP20
3.3V LVTTL/LVCMOS-to-Differential
LVPECL Translator
Applications
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LVPECL clock source
General Description
The TLSI T73LVP20 is a general-purpose LVTTL/LVCMOS-to-differential LVPECL translator operating
from a single +3.3V supply. The device accepts an LVTTL or LVCMOS input and provides differential
LVPECL outputs referenced to the positive supply rail. Both the tiny 6-pin SOT and 8-pin SOIC packages
make it ideal for applications which require the translation of a clock or a data signal, and where cost,
performance and size are of critical importance. The T73LVP20 is 100K PECL compatible and is
a pin-for-
pin replacement for the MC100EPT20D (8-pin SOIC only).
Features
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350pS typical propagation delay
Operating Frequency > 1 GHz
Differential LVPECL outputs
Flow-through pinout
Q output defaults low with input (D)
open
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ESD rating >2000V (Human Body
Model) or >200V (Machine Model)
-40
o
C to +85
o
C operating temperature
range
Available as die, in tiny 6-pin SOT or
standard 8-pin SOIC packages
Figure 1. Functional Block Diagrams & Pin Assignments (Top View)
See pages 4 & 5 for package outline drawings
and
ordering information.
T73LVP20PI
Page
1
Rev A February 23, 2004
TLSI Incorporated, 770 Park Avenue, Huntington NY 11743
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(631) 755-7005
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Fax 631-755-7626
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www.tlsi.com

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