3.3V 32-1250Mbps AnyRate鈩?/div>
CLOCK AND DATA RECOVERY
FEATURES
s
Industrial temperature range (鈥?0
擄
C to +85
擄
C)
s
3.3V power supply
s
Clock and data recovery from 32Mbps up to
1.25Gbps NRZ data stream
s
Complies with Bellcore, ITU/CCITT and ANSI
specifications for applications such as OC-1, OC-3,
OC-12, ATM, FDDI, etc.
s
Two on-chip PLLs: one for clock generation and
another for clock recovery
s
Selectable reference frequencies
s
Differential PECL high-speed serial I/O
s
Line receiver input: No external buffering needed
s
Link fault indication
s
100K ECL compatible I/O
s
Available in 28-pin SOIC and 32-pin EP-TQFP
packages
SY87701L
DESCRIPTION
The SY87701L is a complete Clock Recovery and Data
Retiming integrated circuit for data rates from 32Mbps
up to 1.25Gbps NRZ. The device is ideally suited for
SONET/SDH/ATM and Fibre Channel applications and
other high-speed data transmission systems.
Clock recovery and data retiming is performed by
synchronizing the on-chip VCO directly to the incoming
data stream. The VCO center frequency is controlled by
the reference clock frequency and the selected divide
ratio. On-chip clock generation is performed through the
use of a frequency multiplier PLL with a byte rate source
as reference.
The SY87701L also includes a link fault detection
circuit.
APPLICATIONS
s
SONET/SDH/ATM OC-1, OC-3, OC-12, OC-24
s
Fibre Channel, Escon
s
Gigabit Ethernet/Fast Ethernet
s
Proprietary architecture up to 1.25Gbps
BLOCK DIAGRAM
PLLR P/N
RDOUTP
(PECL)
RDOUTN
RCLKP
(PECL)
RCLKN
PHASE/
FREQUENCY
DETECTOR
LINK
FAULT
DETECTOR
RDINP
(PECL)
RDINN
PHASE
DETECTOR
0
1
CHARGE
PUMP
VCO
CD
(PECL)
REFCLK
(TTL)
PHASE/
FREQUENCY
DETECTOR
LFIN
(TTL)
CHARGE
PUMP
VCO
1
0
TCLKP
(PECL)
TCLKN
DIVIDER
BY 8, 10, 16, 20
SY87701L
DIVSEL 1/2
(TTL)
PLLS P/N
FREQSEL 1/2/3
(TTL)
CLKSEL
(TTL)
V
CC
V
CCA
V
CCO
GND
AnyRate鈩?is a trademark of Micrel, Inc.
Rev.: B
Amendment: /0
1
Issue Date: September 2000