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SY87700L Datasheet

  • SY87700L

  • 3.3V 32-175Mbps AnyRate⑩ CLOCK AND DATA RECOVERY

  • 12頁

  • MICREL   MICREL

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3.3V 32-175Mbps AnyRate鈩?/div>
CLOCK AND DATA RECOVERY
SY87700L
FEATURES
s
Industrial temperature range (鈥?0
擄
C to +85
擄
C)
s
3.3V power supply
s
SONET/SDH/ATM compatible
s
Clock and data recovery from 32Mbps up to
175Mbps NRZ data stream
s
Two on-chip PLLs: one for clock generation and
another for clock recovery
s
Selectable reference frequencies
s
Differential PECL high-speed serial I/O
s
Line receiver input: no external buffering needed
s
Link Fault indication
s
100K ECL compatible I/O
s
Complies with Bellcore, ITU/CCITT and ANSI
specifications for applications such as OC-1 and
OC-3
s
Available in 28-pin SOIC and 32-pin EP-TQFP
packages
DESCRIPTION
The SY87700L is a complete Clock Recovery and Data
Retiming integrated circuit for data rates from 32Mbps
up to 175Mbps NRZ. The device is ideally suited for
SONET/SDH/ATM applications and other high-speed data
transmission systems.
Clock recovery and data retiming is performed by
synchronizing the on-chip VCO directly to the incoming
data stream. The VCO center frequency is controlled by
the reference clock frequency and the selected divide
ratio. On-chip clock generation is performed through the
use of a frequency multiplier PLL with a byte rate source
as reference.
The SY87700L also includes a link fault detection
circuit.
APPLICATIONS
s
SONET/SDH/ATM OC-1 and OC-3
s
Fast Ethernet
s
Proprietary architecture up to 175Mbps
BLOCK DIAGRAM
PLLR P/N
RDOUTP
(PECL)
RDOUTN
0
1
PHASE/
FREQUENCY
DETECTOR
LINK
FAULT
DETECTOR
RDINP
(PECL)
RDINN
PHASE
DETECTOR
CHARGE
PUMP
VCO
RCLKP
(PECL)
RCLKN
CD
(PECL)
REFCLK
(TTL)
LFIN
(TTL)
PHASE/
FREQUENCY
DETECTOR
CHARGE
PUMP
VCO
1
0
TCLKP
(PECL)
TCLKN
DIVIDER
BY 8, 10, 16, 20
SY87700L
DIVSEL 1/2
(TTL)
PLLS P/N
FREQSEL 1/2/3
(TTL)
CLKSEL
(TTL)
V
CC
V
CCA
V
CCO
GND
AnyRate鈩?is a trademark of Micrel, Inc.
Rev.: B
Amendment: /0
1
Issue Date: September 2000

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