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SY55855V Datasheet

  • SY55855V

  • DUAL CML/PECL/LVPECL-to-LVDS TRANSLATOR

  • 85.02KB

  • 7頁

  • MICREL   MICREL

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Micrel
DUAL CML/PECL/LVPECL-to-LVDS
TRANSLATOR
SuperLite鈩?/div>
SY55855V
SY55855V
FINAL
SuperLite鈩?/div>
FEATURES
s
Guaranteed f
MAX
>750MHz over temperature
s
1.5Gbps throughput capability
s
3.0V to 5.7V power supply
s
Guaranteed <700ps propagation delay over
temperature
s
Guaranteed <50ps within-device skew over
temperature
s
LVDS compatible outputs
s
Fully differential I/O architecture
s
Wide operating temperature range: 鈥?0
擄
C to +85
擄
C
s
Available in a tiny 10-pin MSOP package
SuperLite鈩?/div>
DESCRIPTION
The SY55855V is a fully differential, CML/PECL/
LVPECL-to-LVDS translator. It achieves LVDS signaling
up to 1.5Gbps, depending on the distance and the
characteristics of the media and noise coupling sources.
LVDS is intended to drive 50鈩?impedance transmission
line media such as PCB traces, backplanes, or cables.
SY55855V inputs can be terminated with a single
resistor between the true and the complement pins of a
given input.
The SY55855V is a member of Micrel鈥檚 new
SuperLite鈩?family of high-speed logic devices. This family
features very small packaging, high signal integrity, and
operation at many different supply voltages.
PIN CONFIGURATION
D0 1
/D0 2
D1 3
/D1 4
GND 5
10 VCC
9 Q0
8 /Q0
7 Q1
6 /Q1
APPLICATIONS
s
High-speed logic
s
Data communications systems
s
Wireless communications systems
s
Telecom systems
10-Pin MSOP
FUNCTIONAL BLOCK DIAGRAM
PIN NAMES
Pin
Function
CML/PECL/LVPECL Input Data
CML/PECL/LVPECL Input Data
LVDS Output Data
LVDS Output Data
Ground
V
CC
D0
/D0
Q0
/Q0
D0, /D0
D1, /D1
Q0, /Q0
D1
/D1
Q1
/Q1
Q1, /Q1
GND
V
CC
SuperLite is a trademark of Micrel, Inc.
Rev.: C
Amendment: /0
1
Issue Date: March 2003

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