9-BIT TTL-TO-ECL WITH
TTL, ECL ENABLE
SY10H600
SY100H600
FEATURES
s
9-bit ideal for byte-parity applications
s
Flow-through configuration
s
Extra TTL and ECL power/ground pins to minimize
switching noise
s
ECL and TTL enable inputs
s
Dual supply
s
3.5ns max. D to Q
s
PNP TTL inputs for low loading
s
Choice of ECL compatibility: MECL 10KH (10Hxxx)
or 100K (100Hxxx)
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Fully compatible with Motorola MC10H/100H600
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Available in 28-pin PLCC package
DESCRIPTION
The SY10/100H600 are 9-bit, dual supply TTL-to-ECL
translators. Devices in the Micrel-Synergy 9-bit translator
series utilize the 28-lead PLCC for optimal power pinning,
signal flow-through and electrical performance.
The H600 features both ECL and TTL logic enable
controls for maximum flexibility.
The 10H version is compatible with MECL 10KH ECL
logic levels. The 100H version is compatible with 100K
levels.
BLOCK DIAGRAM
ENECL
ENTTL
D
0
D
1
D
2
D
3
TTL
D
4
D
5
D
6
D
7
D
8
Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
Q
8
ECL
PIN CONFIGURATION
V
CCT
D
3
D
5
D
4
D
2
D
1
D
0
25 24 23 22 21 20 19
D
6
D
7
D
8
GND
ENTTL
NC
ENECL
26
27
28
1
2
3
4
5
6
7
8
9
10 11
18
17
16
Q
0
Q
1
V
CCE
V
CCO
Q
2
V
CCO
Q
3
TOP VIEW
PLCC
15
14
13
12
V
CCO
Q
6
V
EE
PIN NAMES
Pin
GND
V
CCE
V
CCO
V
CCT
V
EE
D
0
鈥揇
8
Q
0
鈥換
8
ENECL
ENTTL
Function
TTL Ground (0V)
ECL V
CC
(0V)
ECL V
CC
(0V) 鈥?Outputs
TTL Supply (+5.0V)
ECL Supply (鈥?.2/鈥?.5V)
Data Inputs (TTL)
Data Outputs (ECL)
Enable Control (ECL)
Enable Control (TTL)
Rev.: D
Amendment: /0
1
Q
5
Q
4
Issue Date: February, 1998
Q
8
Q
7