PECL-to-TTL
TRANSLATOR
SY10H350
FINAL
FEATURES
s
Single 5V power supply
s
Propagation delay, 3.5ns typical
s
Fully compatible with Motorola MC10H350
s
Available in 20-pin PLCC package
DESCRIPTION
The SY10H350 consists of 4 translators with differential
inputs and TTL outputs. The 3-state outputs can be
disabled by applying a HIGH TTL logic level on the
common OE input.
The SY10H350 is designed to be used primarily in
systems incorporating both ECL and TTL logic operating
off a common power supply. The separate V
CC
power
pins are not connected internally and thus isolate the
noisy TTL V
CC
runs from the relatively quiet ECL V
CC
runs on the printed circuit board. The differential inputs
allow the H350 to be used as an inverting or noninverting
translator, or a differential line receiver. The H350 can
also drive CMOS with the addition of a pullup resistor.
BLOCK DIAGRAM
12
PIN CONFIGURATION
/D2
/D3
NC
D2
4
3
5
Q2 19
18
17
16 15
14
D3
13 Q3
12 /OE
11 NC
10 GND
9
Q1
8
D1
Rev.: A
7
8
14
15
9
VCCT 20
NC 1
VCCE
2
3
Top View
PLCC
J20-1
13
Q0
4
5
/D0
6
NC
7
/D1
17
18
19
D0
V
CC
(+5 VDC) = Pins 2 and 20; GND = Pin 10
PIN NAMES
Pin
D
0
鈥?D
3
/D
0
鈥?/D
3
Q
0
鈥?Q
3
V
CCE
V
CCT
GND
/OE
Function
True PECL Inputs
Inverted PECL Inputs
TTL Outputs
PECL V
CC
(5.0V)
TTL V
CC
(5.0V)
Ground
Output Enable
Amendment: /1
1
Issue Date: December 2000