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SY100EL52ZCTR Datasheet

  • SY100EL52ZCTR

  • DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP

  • 4頁

  • MICREL   MICREL

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DIFFERENTIAL DATA AND
CLOCK D FLIP-FLOP
SY10EL52
SY100EL52
FEATURES
s
365ps propagation delay
s
2.0GHz toggle frequency
s
Internal 75K
鈩?/div>
input pull-down resistors
s
Available in 8-pin SOIC package
DESCRIPTION
The SY10/100EL52 are differential data, differential
clock D flip-flops. These devices are functionally
equivalent to the E452 devices, with higher performance
capabilities. With propagation delays and output transition
times significantly faster than the E452, the EL52 is ideally
suited for those applications which require the ultimate
in AC performance.
Data enters the master portion of the flip-flop when
the clock is LOW and is transferred to the slave, and
thus the outputs, upon a positive transition of the clock.
The differential clock inputs also allow the EL52 to be
used as a negative edge triggered device.
The EL52 employs input clamping circuitry so that,
under open input conditions (pulled down to V
EE
), the
outputs of the device will remain stable.
PIN CONFIGURATION/BLOCK DIAGRAM
D
D
CLK
CLK
1
2
3
4
D
8
7
Flip-Flop
6
5
V
CC
Q
Q
V
EE
SOIC
TOP VIEW
PIN NAMES
Pin
D
CLK
Q
Data Input
Clock Input
Data Output
Function
TRUTH TABLE
(1)
D
L
H
NOTE:
1. Z = LOW-to-HIGH transition.
CLK
Z
Z
Q
L
H
Rev.: F
Amendment: /0
1
Issue Date: August, 1998

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