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input pull-down resistors
s
Available in 8-pin SOIC package
SY10EL05
SY100EL05
DESCRIPTION
The SY10/100EL05 are 2-input differential AND/NAND
gates. These devices are functionally equivalent to the
E404 devices, with higher performance capabilities. With
propagation delays and output transition times
significantly faster than the E404, the EL05 is ideally
suited for those applications which require the ultimate
in AC performance.
Because a negative 2-input NAND is equivalent to a
2-input OR function with inverted inputs, the differential
inputs and outputs of the device allows the EL05 to also
be used as a 2-input differential OR/NOR gate.
The differential inputs employ clamp circuitry so that,
under open conditions (pulled down to V
EE
), the input to
the AND gate will be HIGH. In this way, if one set of
inputs is open, the gate will remain active to the other
input.
PIN CONFIGURATION/BLOCK DIAGRAM
PIN NAMES
Pin
D
0
, D
1
Function
Data Inputs
Data Outputs
D
0
D
0
D
1
D
1
1
2
3
4
8
7
6
5
V
CC
Q
Q
V
EE
Q
SOIC
TOP VIEW
Rev.: E
Amendment: /0
1
Issue Date: August, 1998