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STY30NA50 Datasheet

  • STY30NA50

  • N - CHANNEL ENHANCEMENT MODE FAST POWER MOS TRANSISTOR

  • 4頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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STY30NA50
N - CHANNEL ENHANCEMENT MODE
FAST POWER MOS TRANSISTOR
PRELIMINARY DATA
TYPE
STY30NA50
s
s
V
DSS
500 V
R
DS(on)
< 0.175
鈩?/div>
I
D
30 A
s
s
s
s
s
s
TYPICAL R
DS(on)
= 0.15
鈩?/div>
EFFICIENT AND RELIABLE MOUNTING
THROUGH CLIP
鹵
30V GATE TO SOURCE VOLTAGE RATING
REPETITIVE AVALANCHE TESTED
LOW INTRINSIC CAPACITANCE
100% AVALANCHE TESTED
GATE CHARGE MINIMIZED
REDUCED THRESHOLD VOLTAGE SPREAD
TM
Max247
TM
DESCRIPTION
T he Max247
package is a new high volume
power package exibiting the same footprint as the
industry standard T O-247, but designed to
accomodate much larger silicon chips, normally
supplied in bigger packages such as TO -264. The
increased die capacity makes the device ideal to
reduce component count in multiple paralleled
designs and save board space with respect to
larger packages.
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s
HIGH CURRENT, HIGH SPEED SWITCHING
s
SWITCH MODE POWER SUPPLIES (SMPS)
s
DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES (UPS)
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(鈥?
P
t ot
Parameter
Drain-source Voltage (V
GS
= 0)
Drain- gate Voltage (R
GS
= 20 k鈩?
Gate-source Voltage
Drain Current (continuous) at T
c
= 25 C
Drain Current (continuous) at T
c
= 100 C
Drain Current (pulsed)
Total Dissipation at T
c
= 25 C
Derating Factor
T
stg
T
j
St orage Temperature
Max. Operating Junction Temperature
o
o
o
Value
500
500
鹵
30
30
19
120
300
2.4
-55 to 150
150
Uni t
V
V
V
A
A
A
W
W/
o
C
o
o
C
C
(鈥? Pulse width limited by safe operating area
March 1996
1/4

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