(on) = 0.075鈩?/div>
HIGH dv/dt AND AVALANCHE CAPABILITIES
100% AVALANCHE TESTED
LOW INPUT CAPACITANCE AND GATE
CHARGE
LOW GATE INPUT RESISTANCE
TIGHT PROCESS CONTROL AND HIGH
MANUFACTURING YIELDS
DESCRIPTION
This improved version of MDmesh鈩?which is based
on Multiple Drain process represents the new
benchmark in high voltage MOSFETs. The resulting
product exhibits even lower on-resistance, impres-
sively high dv/dt and excellent avalanche character-
istics. The adoption of the Company鈥檚 proprietary
strip technique yields overall performances that are
significantly better than that of similar competition鈥檚
products.
APPLICATIONS
The MDmesh鈩?family is very suitable for increasing
power density of high voltage converters allowing
system miniaturization and higher efficiencies.
3
2
1
TO-247
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
( )
P
TOT
dv/dt (1)
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k鈩?
Gate- source Voltage
Drain Current (continuous) at T
C
= 25擄C
Drain Current (continuous) at T
C
= 100擄C
Drain Current (pulsed)
Total Dissipation at T
C
= 25擄C
Derating Factor
Peak Diode Recovery voltage slope
Storage Temperature
Max. Operating Junction Temperature
Value
600
600
鹵30
47
28
180
417
3.33
15
鈥?5 to 150
150
(1) I
SD
鈮?7A,
di/dt
鈮?00A/碌s,
V
DD
鈮?/div>
V
(BR)DSS
, T
j
鈮?/div>
T
JMAX.
Unit
V
V
V
A
A
A
W
W/擄C
V/ns
擄C
擄C
(鈥?Pulse width limited by safe operating area
January 2003
1/6
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