鈩?/div>
100% AVALANCHE TESTED
DESCRIPTION
This Power MOSFET series realized with STMicroelec-
tronics unique STripFET process has specifically been
designed to minimize input capacitance and gate charge.
It is particularly suitable in OR-ing function circuits and
synchronous rectification.
APPLICATIONS
s
HIGH-EFFICIENCY DC-DC CONVERTERS
s
HIGH CURRENT, HIGH SWITCHING SPEED
s
OR-ING FUNCTION
1
TO-247
2
3
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
(鈥?
I
D
I
DM
(鈥⑩€?
P
tot
dv/dt
(1)
E
AS (2)
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k鈩?
Gate- source Voltage
Drain Current (continuous) at T
C
= 25擄C
Drain Current (continuous) at T
C
= 100擄C
Drain Current (pulsed)
Total Dissipation at T
C
= 25擄C
Derating Factor
Peak Diode Recovery voltage slope
Single Pulse Avalanche Energy
Storage Temperature
Operating Junction Temperature
Value
30
30
鹵 20
120
120
480
350
2.33
1.5
4
-55 to 175
Unit
V
V
V
A
A
A
W
W/擄C
V/ns
J
擄C
(鈥⑩€?
Pulse width limited by safe operating area.
(鈥?
Current limited by package
October 2002
(1) I
SD
鈮?20A,
di/dt
鈮?00A/碌s,
V
DD
鈮?/div>
V
(BR)DSS
, T
j
鈮?/div>
T
JMAX.
(2) Starting T
j
= 25
o
C, I
D
= 60 A, V
DD
= 15V
1/8
next