Using the latest high voltage MESH OVERLAY鈩?/div>
process, STMicroelectronics has designed an ad-
vanced family of power MOSFETs with outstanding
performances. The new patent pending strip layout
coupled with the Company鈥檚 proprieraty edge termi-
nation structure, gives the lowest R
DS(on)
per area,
exceptional avalanche and dv/dt capabilities and
unrivalled gate charge and switching characteris-
tics.
APPLICATIONS
s
HIGH CURRENT, HIGH SPEED SWITCHING
s
SWITH MODE POWER SUPPLIES (SMPS)
s
DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(
l
)
P
TOT
dv/dt (1)
V
ISO
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k鈩?
Gate- source Voltage
Drain Current (continuos) at T
C
= 25擄C
Drain Current (continuos) at T
C
= 100擄C
Drain Current (pulsed)
Total Dissipation at T
C
= 25擄C
Derating Factor
Peak Diode Recovery voltage slope
Insulation Withstand Voltage (DC)
Storage Temperature
Max. Operating Junction Temperature
INTERNAL SCHEMATIC DIAGRAM
Value
STW18NB40
400
400
鹵30
18.4
11.6
73.6
190
1.52
4.5
-
鈥?5 to 150
150
(1)I
SD
<18.4A, di/dt<200A/碌, V
DD
<V
(BR)DSS
,TJ<T
JMAX
Unit
V
V
V
12.4
7.8
73.6
80
0.64
4.5
2000
A
A
A
W
W/擄C
V/ns
V
擄C
擄C
STH18NB40FI
(鈥?Pulse width limited by safe operating area
June 2002
1/7