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STW10NA50 Datasheet

  • STW10NA50

  • N - CHANNEL ENHANCEMENT MODE FAST POWER MOS TRANSISTOR

  • 11頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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STH10NA50/FI
STW10NA50
N - CHANNEL ENHANCEMENT MODE
FAST POWER MOS TRANSISTOR
TYPE
STH10NA50
STH10NA50FI
STW10NA50
s
s
s
s
s
s
s
V
DSS
500 V
500 V
500 V
R
DS( on)
< 0.8
鈩?/div>
< 0.8
鈩?/div>
< 0.8
鈩?/div>
I
D
9.6 A
5.6 A
9.6 A
TO-247
TYPICAL R
DS(on)
= 0.7
鈩?/div>
鹵
30V GATE TO SOURCE VOLTAGE RATING
100% AVALANCHE TESTED
REPETITIVE AVALANCHE DATA AT 100
o
C
LOW INTRINSIC CAPACITANCES
GATE GHARGE MINIMIZED
REDUCED THRESHOLD VOLTAGE SPREAD
1
3
2
1
DESCRIPTION
This series of POWER MOSFETS represents the
most advanced high voltage technology. The
optimized cell layout coupled with a new
proprietary edge termination concur to give the
device low R
DS(on)
and gate charge, unequalled
ruggedness and superior switching performance.
APPLICATIONS
s
HIGH CURRENT, HIGH SPEED SWITCHING
s
SWITCH MODE POWER SUPPLIES (SMPS)
s
DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
3
2
3
2
TO-218
ISOWATT218
1
INTERNAL SCHEMATIC DIAGRAM
Value
STW/STH10NA50
STH10NA50FI
Unit
V
D S
V
DG R
V
GS
I
D
I
D
I
D M
(鈥?
P
tot
V
ISO
T
stg
T
j
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
G S
= 20 k鈩?
Gate-source Voltage
Drain Current (continuous) at T
c
= 25
o
C
Drain Current (continuous) at T
c
= 100 C
Drain Current (pulsed)
Total Dissipation at T
c
= 25
o
C
Derating Factor
Insulation Withstand Voltage (DC)
Storage Temperature
Max. Operating Junction Temperature
o
500
500
鹵
30
9.6
6.1
38
150
1.2
錚?/div>
-65 to 150
150
5.6
3.5
38
60
0.48
4000
V
V
V
A
A
A
W
W/
o
C
V
o
o
C
C
(鈥? Pulse width limited by safe operating area
November 1996
1/11

STW10NA50 產(chǎn)品屬性

  • STMicroelectronics

  • N-Channel

  • 500 V

  • +/- 30 V

  • 9.6 A

  • 0.8 Ohms

  • Single

  • + 150 C

  • Through Hole

  • TO-247

  • 15 ns

  • - 65 C

  • 150 W

  • 25 ns

  • 30

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