鈻?/div>
Standard definition input
鈥?ITU-R BT.656/601 video input
鈥?Separate H/V inputs synchronous with input
clock
鈥?3D temporal noise reduction with comet-
effect correction
鈥?Movie mode detection with motion phase
recovery
鈥?Scene-change detector for contrast enhancer
and up-conversion control
鈥?Letterbox format detection and auto-format
correction
Embedded 32-bit ST20 CPU core
Peripherals and I/Os for TV Chassis Control
鈥?30 fully-programmable I/Os (5V tolerant)
鈥?4 external interrupts
鈥?8-bit programmable PWM with 4 inputs/
outputs
鈥?Infrared digital preprocessor
鈥?Real time clock and watchdog timer
鈥?4 16-bit standard timers
鈥?10-bit ADC with 6 inputs and wake-up
capability
鈥?2 Master/slave I虜C bus interfaces
鈥?UART and support for IrDA interfaces
鈻?/div>
High-quality video display
鈥?Picture structure improvement including color
transition improvement, luma peaking/coring
and luma contrast enhancer
鈥?H/V format conversion with zoom In/Out (4x
to 1/8x) with H/V decimation
鈥?Letterbox and 4:3 to 16:9 format conversion
with programmable 5-segment panoramic
mode
鈥?Very flexible sync generator for master and
slave modes by Vsync and Hsync signals
with line-locked pixel clock
鈻?/div>
Teletext 1.5 and 2.5, Closed-Caption, VPS and
WSS VBI data decoding, TeleWeb compliant
Embedded emulation resources with in-situ
flash programming capabilities
1.8V and 3.3V power supplies
Eco standby mode
27-MHz crystal oscillator
Rev. 1
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