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STP9NB50FP Datasheet

  • STP9NB50FP

  • N-CHANNEL 500V - 0.75 ohm - 8.6 A TO-220/TO-220FP PowerMesh ...

  • 9頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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N-CHANNEL 500V - 0.75
鈩?/div>
- 8.6 A TO-220/TO-220FP
PowerMesh鈩?MOSFET
TYPE
STP9NB50
STP9NB50FP
s
s
s
s
s
STP9NB50
STP9NB50FP
V
DSS
500 V
500 V
R
DS(on)
< 0.85
鈩?/div>
< 0.85
鈩?/div>
I
D
8.6 A
4.9 A
TYPICAL R
DS
(on) = 0.75
鈩?/div>
EXTREMELY HIGH dv/dt CAPABILITY
100% AVALANCHE TESTED
VERY LOW INTRINSIC CAPACITANCES
GATE CHARGE MINIMIZED
3
1
2
1
2
3
TO-220
TO-220FP
DESCRIPTION
Using the latest high voltage MESH OVERLAY鈩?/div>
process, STMicroelectronics has designed an ad-
vanced family of power MOSFETs with outstanding
performances. The new patent pending strip layout
coupled with the Company鈥檚 proprieraty edge termi-
nation structure, gives the lowest R
DS(on)
per area,
exceptional avalanche and dv/dt capabilities and
unrivalled gate charge and switching characteris-
tics.
APPLICATIONS
s
HIGH CURRENT, HIGH SPEED SWITCHING
s
SWITH MODE POWER SUPPLIES (SMPS)
s
DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(
q
)
P
TOT
dv/dt (1)
V
ISO
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k鈩?
Gate- source Voltage
Drain Current (continuos) at T
C
= 25擄C
Drain Current (continuos) at T
C
= 100擄C
Drain Current (pulsed)
Total Dissipation at T
C
= 25擄C
Derating Factor
Peak Diode Recovery voltage slope
Insulation Withstand Voltage (DC)
Storage Temperature
Max. Operating Junction Temperature
INTERNAL SCHEMATIC DIAGRAM
Value
STP9NB50
500
500
鹵30
8.6
5.4
34.4
125
1
4.5
-
鈥?5 to 150
150
(1)I
SD
<9A, di/dt<200A/碌, V
DD
<V
(BR)DSS
,TJ<T
JMAX
Unit
STP9NB50FP
V
V
V
4.9
3.1
34.4
40
0.32
4.5
2000
A
A
A
W
W/擄C
V/ns
V
擄C
擄C
(鈥?Pulse width limited by safe operating area
May 2000
1/9

STP9NB50FP相關(guān)型號PDF文件下載

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