鈩?/div>
EXCEPTIONAL dv/dt CAPABILITY
100% AVALANCHE TESTED
APPLICATION ORIENTED
CHARACTERIZATION
1
2
3
DESCRIPTION
This Power MOSFET is the latest development of
STMicroelectronis unique "Single Feature Size鈩?quot;
strip-based process. The resulting transistor
shows extremely high packing density for low on-
resistance, rugged avalanche characteristics and
less critical alignment steps therefore a remark-
able manufacturing reproducibility.
APPLICATIONS
s
MOTOR CONTROL
s
DC-DC & DC-AC CONVERTERS
TO-220
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
(*)
I
D
I
DM
(鈥?
P
tot
dv/dt
(1)
E
AS (2)
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k鈩?
Gate- source Voltage
Drain Current (continuos) at T
C
= 25擄C
Drain Current (continuos) at T
C
= 100擄C
Drain Current (pulsed)
Total Dissipation at T
C
= 25擄C
Derating Factor
Peak Diode Recovery voltage slope
Single Pulse Avalanche Energy
Storage Temperature
Max. Operating Junction Temperature
Value
55
55
鹵 16
80
57
320
300
2
7
1.4
-55 to 175
Unit
V
V
V
A
A
A
W
W/擄C
V/ns
mJ
擄C
(鈥?
Pulse width limited by safe operating area
(*) Current Limited by Package
Note: For the P-CHANNEL MOSFET actual polarity of voltages and
current has to be reversed
(1) I
SD
鈮?/div>
40A, di/dt
鈮?/div>
300A/碌s, V
DD
鈮?/div>
V
(BR)DSS
, T
j
鈮?/div>
T
JMAX.
(2) Starting T
j
= 25
o
C, I
D
= 80A, V
DD
= 40V
February 2002
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
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