鈩⑩€?/div>
strip-based process. The result-
ing transistor shows the best trade-off between on-
resistance and gate charge. When used as high
and low side in buck regulators, it gives the best
performance in terms of both conduction and
switching losses. This is extremely important for
motherboards where fast switching and high effi-
ciency are of paramount importance.
APPLICATIONS
s
SPECIFICALLY DESIGNED AND OPTIMISED
FOR HIGH EFFICIENCY CPU CORE DC/DC
CONVERTERS
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(
q
)
P
TOT
dv/dt (1)
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k鈩?
Gate- source Voltage
Drain Current (continuos) at T
C
= 25擄C
Drain Current (continuos) at T
C
= 100擄C
Drain Current (pulsed)
Total Dissipation at T
C
= 25擄C
Derating Factor
Peak Diode Recovery voltage slope
Storage Temperature
Max. Operating Junction Temperature
Value
30
30
鹵 15
70
50
280
100
0.67
4
鈥?5 to 175
175
(1) I
SD
鈮?0A,
di/dt
鈮?90A/碌s,
V
DD
=24 V ; T
j
鈮?/div>
T
JMAX.
Unit
V
V
V
A
A
A
W
W/擄C
V/ns
擄C
擄C
(
q
) Pulse width limited by safe operating area
March 2001
1/9
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