Using the latest high voltage MESH OVERLAY鈩?/div>
process, STMicroelectronics has designed an ad-
vanced family of power MOSFETs with outstanding
performances. The new patent pending strip layout
coupled with the Company鈥檚 proprieraty edge termi-
nation structure, gives the lowest R
DS(on)
per area,
exceptional avalanche and dv/dt capabilities and
unrivalled gate charge and switching characteris-
tics.
APPLICATIONS
s
HIGH CURRENT, HIGH SPEED SWITCHING
s
UNINTERRUPTIBLE POWER SUPPLY (UPS)
s
DC-DC & DC-AC CONVERTERS FOR
TELECOM , INDUSTRIAL AND CONSUMER
ENVIRONMENT
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(
q
)
P
TOT
dv/dt (1)
V
ISO
T
stg
T
j
Jun 2000
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k鈩?
Gate- source Voltage
Drain Current (continuos) at T
C
= 25擄C
Drain Current (continuos) at T
C
= 100擄C
Drain Current (pulsed)
Total Dissipation at T
C
= 25擄C
Derating Factor
Peak Diode Recovery voltage slope
Insulation Withstand Voltage (DC)
Storage Temperature
Max. Operating Junction Temperature
INTERNAL SCHEMATIC DIAGRAM
Value
STP6NB25
250
250
鹵30
6
3.8
24
75
0.6
5.5
-
鈥?0 to 150
150
(1)I
SD
鈮?A,
di/dt
鈮?00A/碌s,
V
DD
鈮?/div>
V
(BR)DSS
, T
j
鈮?/div>
T
JMAX.
Unit
V
V
V
3.7
2.3
24
30
0.24
2000
擄C
擄C
1/9
A
A
A
W
W/擄C
V/ns
STP6NB25FP
(鈥?Pulse width limited by safe operating area
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