鈩⑩€?/div>
strip-based process. The resulting tran-
sistor shows extremely high packing density for
low on-resistance, rugged avalance characteris-
tics and less critical alignment steps therefore a re-
markable manufacturing reproducibility.
D
2
PAK
TO-220
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s
HIGH-EFFICIENCY DC-DC CONVERTERS
s
SOLENOID AND RELAY DRIVERS
s
MOTOR CONTROL, AUDIO AMPLIFIERS
s
DC-DC & DC-AC CONVERTERS
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
( )
P
TOT
dv/dt (1)
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k鈩?
Gate- source Voltage
Drain Current (continuos) at T
C
= 25擄C
Drain Current (continuos) at T
C
= 100擄C
Drain Current (pulsed)
Total Dissipation at T
C
= 25擄C
Derating Factor
Peak Diode Recovery voltage slope
Storage Temperature
Max. Operating Junction Temperature
Value
60
60
鹵16
38
26
152
80
0.53
7
鈥?5 to 175
(1) I
SD
鈮?8A,
di/dt
鈮?00A/碌s,
V
DD
鈮?/div>
V
(BR)DSS
, T
j
鈮?/div>
T
JMAX.
Unit
V
V
V
A
A
A
W
W/擄C
V/ns
擄C
(
q
) Pulse width limited by safe operating area
September 2002
1/10
next