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STP3NA100FI Datasheet

  • STP3NA100FI

  • N - CHANNEL ENHANCEMENT MODE FAST POWER MOS TRANSISTOR

  • 9頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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STP3NA100
STP3NA100FI
N - CHANNEL ENHANCEMENT MODE
FAST POWER MOS TRANSISTOR
TYPE
STP3NA100
STP3NA100F I
s
s
s
s
s
s
s
V
DSS
1000 V
1000 V
R
DS(on)
<5
鈩?/div>
< 5
鈩?/div>
I
D
3.5 A
2 A
TYPICAL R
DS(on)
= 4.3
鈩?/div>
鹵
30V GATE TO SOURCE VOLTAGE RATING
100% AVALANCHE TESTED
REPETITIVE AVALANCHE DATA AT 100
o
C
LOW INTRINSIC CAPACITANCES
GATE CHARGE MINIMIZED
REDUCED THRESHOLD VOLTAGE SPREAD
1
2
3
1
2
3
APPLICATIONS
s
HIGH CURRENT, HIGH SPEED SWITCHING
s
SWITCH MODE POWER SUPPLIES (SMPS)
s
DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
TO-220
TO-220FI
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(鈥?
P
t ot
V
ISO
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain- gate Voltage (R
GS
= 20 k鈩?
Gate-source Voltage
Drain Current (continuous) at T
c
= 25
o
C
Drain Current (continuous) at T
c
= 100 C
Drain Current (pulsed)
Total Dissipation at T
c
= 25 C
Derating F actor
Insulation Withstand Voltage (DC)
Storage T emperature
Max. O perating Junction Temperature
o
o
Value
ST P3NA100
ST P3NA100FI
1000
1000
鹵
30
3.5
2.0
14
110
0.88
錚?/div>
-65 to 150
150
2.0
1.2
14
45
0.36
2000
Uni t
V
V
V
A
A
A
W
W/ C
V
o
o
o
C
C
1/9
(鈥? Pulse width limited by safe operating area
February 1998

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