(on) = 0.16鈩?/div>
HIGH dv/dt AND AVALANCHE CAPABILITIES
100% AVALANCHE TESTED
LOW INPUT CAPACITANCE AND GATE CHARGE
LOW GATE INPUT RESISTANCE
TO-220FP
12
3
DESCRIPTION
The MDmesh鈩?is a new revolutionary MOSFET tech-
nology that associates the Multiple Drain process with
the Company鈥檚 PowerMESH鈩?horizontal layout. The
resulting product has an outstanding low on-resis-
tance, impressively high dv/dt and excellent avalanche
characteristics. The adoption of the Company鈥檚 propri-
etary strip technique yields overall dynamic perfor-
mance that is significantly better than that of similar
competition鈥檚 products.
APPLICATIONS
The MDmesh鈩?family is very suitable for increasing
power density of high voltage converters allowing sys-
tem miniaturization and higher efficiencies.
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(
q
)
P
TOT
dv/dt(1)
V
ISO
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k鈩?
Gate- source Voltage
Drain Current (continuous) at T
C
= 25擄C
Drain Current (continuous) at T
C
= 100擄C
Drain Current (pulsed)
Total Dissipation at T
C
= 25擄C
Derating Factor
Peak Diode Recovery voltage slope
Insulation Winthstand Voltage (DC)
Storage Temperature
Max. Operating Junction Temperature
I虜PAK
(Tabless TO-220)
INTERNAL
SCHEMATIC DIAGRAM
Value
STP(B)22NM50(-1)
500
500
鹵30
20
12.6
80
192
1.2
15
--
鈥?5 to 150
150
(1)I
SD
鈮?0A,
di/dt
鈮?00A/碌s,
V
DD
鈮?/div>
V
(BR)DSS
, T
j
鈮?/div>
T
JMAX.
(*)Limited only by maximum temperature allowed
Unit
STP22NM50FP
V
V
V
20(*)
12.6(*)
80(*)
45
0.36
2000
A
A
A
W
W/擄C
V/ns
V
擄C
擄C
(鈥?Pulse width limited by safe operating area
January 2003
1/10
next