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STP2001QFP Datasheet

  • STP2001QFP

  • I/O Controller

  • 292.88KB

  • 18頁(yè)

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STP2001.frm Page 1 Monday, August 25, 1997 2:46 PM
STP2001QFP
July 1997
Slave I/O
DATA SHEET
D
ESCRIPTION
The STP2001Slave I/O Controller is a highly integrated, low-cost, low-power device designed for use in single-processor
systems with an SBus interface. The STP2001 provides serial I/O for keyboard, mouse and general-purpose use. In addi-
tion, a floppy disk interface, an external byte-wide expansion bus (EBus) for TOD and EPROM, I/O registers and reset
control logic are integrated. Together, the STP2001 and the STP2000 Master I/O Controller, provide a complete I/O
subsystem.
The two serial ports for keyboard/mouse and general purpose use are compatible with the AMD AM85C30, rev C Serial
Communications Controller. The TTY A/B serial ports are fully synchronous, while the keyboard/mouse ports are asyn-
chronous only. All ports support data rates up to 38.4 Kb/s. The NCR82077 floppy disk interface is compatible with the
Intel 8077A-1 single-chip floppy controller, supporting up to a 1 MBit/sec transfer rate.
Integrated SBus Interface Slave I/O Controller
Features
鈥?Integrates two dual serial controllers, a high-speed
floppy controller, uniprocessor interrupt, reset, and
counter/timer circuitry, power-down control and an
EBus in a single package
鈥?Directly interfaces to CPU through the SBus
鈥?Auxiliary I/O registers (used for LED, floppy and
system power-down)
鈥?Interrupt Controller for single-processor SBus
system
鈥?System reset control
鈥?Counter/timers for single-processor SBus system
鈥?EBus interface
鈥?JTAG internal and boundary SCAN logic
鈥?160-pin PQFP packaging
鈥?IC is also available from NCR Corp. (PN -
NCR89105)
Benefits
鈥?Saves cost, power, board space, and weight
鈥?Improved performance
鈥?High level of system integration; ease of design
鈥?High level of system integration; ease of design
鈥?High level of system integration; ease of design
鈥?High level of system integration; ease of design
鈥?Generic 8-bit interface available
鈥?Improved chip and board level testability
鈥?Cost effective packaging
鈥?Second source
1
This Material Copyrighted by Its Respective Manufacturer

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