(on) = 0.4鈩?/div>
HIGH dv/dt AND AVALANCHE CAPABILITIES
100% AVALANCHE TESTED
LOW INPUT CAPACITANCE AND GATE
CHARGE
LOW GATE INPUT RESISTANCE
DESCRIPTION
The MDmesh鈩?is a new revolutionary MOSFET
technology that associates the Multiple Drain pro-
cess with the Company鈥檚 PowerMESH鈩?horizontal
layout. The resulting product has an outstanding low
on-resistance, impressively high dv/dt and excellent
avalanche characteristics. The adoption of the
Company鈥檚 proprietary strip technique yields overall
dynamic performance that is significantly better than
that of similar competition鈥檚 products.
APPLICATIONS
The MDmesh鈩?family is very suitable for increasing
power density of high voltage converters allowing
system miniaturization and higher efficiencies.
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
( )
P
TOT
dv/dt(1)
V
ISO
T
stg
T
j
May 2003
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k鈩?
Gate- source Voltage
Drain Current (continuous) at T
C
= 25擄C
Drain Current (continuous) at T
C
= 100擄C
Drain Current (pulsed)
Total Dissipation at T
C
= 25擄C
Derating Factor
Peak Diode Recovery voltage slope
Insulation Winthstand Voltage (DC)
Storage Temperature
Max. Operating Junction Temperature
TO-220
TO-220FP
3
1
D
2
PAK
3
12
I
2
PAK
INTERNAL SCHEMATIC DIAGRAM
Value
STP(B)11NM60(-1)
600
600
鹵30
11
7
44
160
1.28
15
--
鈥?5 to 150
150
(*)Limited only by maximum temperature allowed
(1)I
SD
<11A, di/dt<400A/碌s, V
DD
<V
(BR)DSS
, T
J
<T
JMAX
Unit
STP11NM60FP
V
V
V
11 (*)
7 (*)
44 (*)
35
0.28
2500
A
A
A
W
W/擄C
V/ns
V
擄C
擄C
1/12
(鈥?Pulse width limited by safe operating area