S amHop Microelectronics C orp.
Apr. 19. 2006
鈩?/div>
) Max
I
D
5A
R
DS (ON)
S uper high dense cell design for low R
DS (ON
).
50 @ V
G S
= 10V
70 @ V
G S
= 4.5V
R ugged and reliable.
S urface Mount P ackage.
S O-8
1
ABS OLUTE MAXIMUM R ATINGS (T
A
=25 C unless otherwise noted)
P arameter
Drain-S ource Voltage R ating
Drain-S ource Voltage
Gate-S ource Voltage
Drain C urrent-C ontinuous @ T
J
=25 C
a
-P ulsed
Drain-S ource Diode Forward C urrent
b
Maximum P ower Dissipation
b
Operating Junction and S torage
Temperature R ange
S ymbol
Vspike
V
DS
V
GS
I
D
I
DM
I
S
P
D
T
J
, T
S TG
d
Limit
60
55
20
5
20
1.7
2.5
-55 to 150
Unit
V
V
V
A
A
A
W
C
THE R MAL C HAR AC TE R IS TIC S
Thermal R esistance, Junction-to-Ambient
a
1
R
JA
50
C /W