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STLC60135 Datasheet

  • STLC60135

  • TOSCA ADSL DMT TRANSCEIVER

  • 25頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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STLC60135
TOSCA鈩?ADSL DMT TRANSCEIVER
DTM modem for ADSL, compatible with the
following standards:
鈥?ANSI T1.413 Issue 2
鈥?ITU-T G.992.1 (G.dmt)
鈥?ITU-T G.992.2 (G.lite)
Same chip for both ATU-C and ATU-R
Supports either ATM (Utopia level 1 & 2) or bit-
stream interface
16 bit multiplexed microprocessor interface (lit-
tle and big endian compatibility)
Analog Front End management
Dual latency paths: fast and interleaved
ATM鈥檚 PHY layer: cell processing (cell deline-
ation, cell insertion, HEC)
ADSL鈥檚 overhead management
Reed Solomon encode/decode
Trellis encode/decode (Viterbi)
DMT mapping/ demapping over 256 carriers
Fine (2ppm) timing recover using Rotor and
Adaptative Frequency Domain Equalizing
Time Domain Equalization
Front end digital filters
0.35碌m HCMOS6 Technology
144 pin PQFP package
Power Consumption 1 Watt at 3.3V
Figure 1. Block Diagram
TEST SIGNALS
PQFP144
ORDERING NUMBER:
STLC60135
Applications
ATU-C:
DSLAM, Routers at Central Office
ATU-R:
Routers at SOHO, stand-alone mo-
dems, PC mother boards
General Description
The STLC60135 is the DMT modem and ATM
framer of the STMicroelectronics Tosca鈩?chipset.
When coupled with STLC60134 analog front-end
and an external controller running dedicated firm-
ware, the product fulfils ANSI T1.413 鈥淚ssue 2鈥?/div>
DMT ADSL specification.
The STLC60135 may be used at both ends of
ADSL loop: ATU-C and ATU-R. The chip sup-
ports UTOPIA level 1 and UTOPIA level 2 inter-
face and a non ATM synchronous bit-stream in-
terface.
CLOCK
TEST
MODULE
DATA SYMBOL TIMING UNIT
VCXO
STM
AFE
INTERFACE
DSP
FRONT-END
FFT/IFFT
ROTOR
TRELLIS
CODING
MAPPER/
DEMAPPER
GENERIC
TC
REED/
SOLOMON
INTERFACE
MODULE
UTOPIA
AFE
CONTROL
AFE
CONTROL
INTERFACE
CONTROLLER INTERFACE
ATM
SPECIFIC
TC
CONTROLLER BUS
GENERAL PURPOSE I/Os
D98TL315
September 1999
1/25

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