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FEATURES
Bluetooth鈩?specification compliance: V1.1 and
V1.2
Ericsson Licensing Technology Baseband Core
(EBC)
Point-to-point, point-to-multi-point (up to 7
slaves) and scatternet capability
Asynchronous Connection Oriented (ACL)
logical transport link
Synchronous Connection Oriented (SCO) link:
2 simultaneous SCO channels
Support Pitch-Period Error Concealment (PPEC)
鈥?Improves speech quality in the vicinity of in-
terference
鈥?Improves coexistence with WLAN
鈥?Works at receiver, no Bluetooth implication
Adaptive Frequency Hopping (AFH): hopping
kernel, channel assessment as Master and as
Slave
Faster Connection: Interlaced scan for Page
and Inquiry scan, first FHS without random back
off, RSSI used to limit range
Extended SCO (eSCO) links
HW support for packet types
鈥?ACL: DM1, 3, 5 and DH1, 3, 5
鈥?SCO: HV1, 3 and DV
鈥?eSCO: EV3, 5
Clock support
鈥?System clock input (digital or sine wave) at
13, 26, 19.2 or 38.4 MHz
鈥?LPO clock input at 3.2, 16.384, 32 or 32.768 kHz
ARM7TDMI CPU
鈥?32-bit Core
鈥?AMBA (AHB-APB) bus configuration
Patch RAM capability
Memory organization
鈥?On chip RAM, including provision for patches
鈥?On chip ROM, preloaded with SW up to HCI
Communication interfaces
鈥?Fast UART
鈥?PCM interface
鈥?4 programmable GPIOs
鈥?External interrupts possible through the GPIOs
鈥?Fast master I2C interface
Efficient support for WLAN coexistence in
collocated scenario
Ciphering support up to 128 bits key
Software support
鈥?Lower level stack (up to HCI)
鈥?HCI Transport Layer: H4 (including propri-
Figure 1. Package
TFBGA84
Table 1. Order Codes
Part Number
STLC2500
Package
TFBGA84
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etary extensions)
鈥?HCI proprietary commands (e.g. peripherals
control)
鈥?Single HCI command for patch/upgrade download
Single power supply with internal regulators for
core voltage generation
Supports 1.65 to 2.85 Volts IO systems
Total number of external components limited to 7
(6 decoupling capacitors and 1 filter) thanks to:
鈥?Fully integrated synthesizer (VCO and loop filter)
鈥?Integrated antenna switch
鈥?Low IF receiver
Auto calibration (VCO, Filters)
No need for calibration of the RF part
Timer and watchdog
Power class 2 compatible
Ultra low power architecture with 3 different low
power levels:
鈥?Sleep Mode
鈥?Deep Sleep Mode
鈥?Complete Power Down Mode
Software Initiated Low Power Mode
Dual Wake-up mechanism: initiated either by
the Host or by the Bluetooth device
Standard TFBGA-84 pins package
2
DESCRIPTION
The STLC2500 is a single chip ROM-based Blue-
tooth solution implemented in 0.13 m ultra low
power, low leakage CMOS technology for applica-
tions requiring integration up to HCI level. Patch
RAM is available enabling multiple patches/up-
grades.
The STLC2500's main interfaces are UART for
HCI transport, PCM for voice and GPIOs for con-
trol purposes. The Radio is designed for the single
chip requirement and for drastic power consump-
tion reduction.
REV. 1
1/23
May 2004
This is preliminary information on a new product now in development. Details are subject to change without notice.
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