STLC1511
NorthenLite鈩?G.lite BiCMOS
Analog Front-End Circuit
PRODUCT PREVIEW
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Wide transmit (~80dB) and receive (~69dB)
dynamic range to limit the external filtering
requirements for extended loop reach operation
Programmable tx gain: 0 梅 -32dB in 2dB steps
14-bit D/A converter in transmit path
Programmable rx gain: 0 梅40dB in 0.5dB steps
12-bit A/D converter in receive path
Integrated phase-locked loop with an externall
LC or crystal oscillator
Low power: 300mW @ 5.0V
64-pin TQFP package
The STLC1511 transmit path consists of a 14-bit
Nyquist rate D/A converter, followed by a program-
mable gain amplifier (TxPGA). The transmit gain is
programmable from 0 to -32dB in 2dB steps.
The STLC1511 receive path contains a buffer ampli-
fier followed by a programmable gain amplifier (RxP-
GA), a low pass anti-aliasing filter, and a 12-bit
Nyquist rate A/D converter. The RxPGA is digitally
programmable from 0 to 40dB in 0.5dB steps.
2.0 PACKAGING AND PIN INFORMATION
2.1 STLC1511 Pin Allocation
The pinout for the STLC1511 is depicted in Figure 1.
TQFP64
ORDERING NUMBER: STLC1511
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1.0 GENERAL DESCRIPTION
The STLC1511 G.lite Analog Front End (AFE) chip
implements the analog transceiver functions required
in both a central office modem and a customer
premise modem. It connects the digital modem chip
with the loop driver and hybrid balance circuits. The
STLC1511 has been designed with excellent dynam-
ic range in order to greatly reduce the external filter-
ing requirements at the front end. The AFE chip and
its companion digital chip along with a loop driver, im-
plement the complete G.992.2 DMT modem solution.
Figure 1. STLC1511 pinout
VSSDIG1
FRMCLK
VCCTXPGA
VEETXPGA
QVEEDAC
VDDESD2
TXDADC1
VSSESD2
VCCDAC
VEEDAC
TXSIN[1]
TXSIN[0]
RESETN
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
VDDDIG1
CK35M
DIGREF
RXSOUT[0]
RXSOUT[1]
VSSDIGE1
VSSDIG2
VDDDIGE1
VDDDIG2
DTX
DIGCLK
ENB
DRX
VEEADC
VCCADC
QVEEADC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
RXDCINP
RXDCINN
RXDCON
RXDCOP
RXINN
RXINP
RXOPIINN
RXOPINP
VCCRXPGA
VEERXPGA
VSSESD1
VDDESD1
QVEERX
ADCDC3
ADCDC2
ADCDC1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
QVEEBIAS
VEEBIAS
VCCBIAS
IREF50m
V3P75V
VCCPLL
VEEPLL
FREQ
OSCNE
OSCNB
OSCPB
OSCPE
VCAP
VDDPLL
VSSPLL
QVEEPLL
QVEETX
TQFP64
TXON
November 2000
This is preliminary information on a new product now in development. Details are subject to change without notice.
TXOP
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