鈩?/div>
@ 10V
IMPROVED DIE-TO-FOOTPRINT RATIO
VERY LOW PROFILE PACKAGE (1mm MAX)
VERY LOW THERMAL RESISTANCE
VERY LOW GATE CHARGE
LOW THRESHOLD DEVICE
PowerFLAT鈩?3.3x3.3)
DESCRIPTION
This application specific MOSFET is the lastest
generation
of
STMicroelectronics
unique
鈥淪TripFET鈩⑩€?technology. The resulting transistor
is optimized for low on-resistance and minimal
gate charge. The Chip-scaled PowerFLAT鈩?pack-
age allows a significant board space saving, still
boosting the performance.
(Chip Scale Package)
Figure 2: Internal Schematic Diagram
APPLICATIONS
s
CONTROL FET IN BUCK CONVERTER
TOP VIEW
Table 2: Order Codes
Part Number
STL8NH3LL
Marking
L8NH3LL
Package
PowerFLAT鈩?(3.3x3.3)
Packaging
TAPE & REEL
Rev 2
October 2004
This is preliminary information on a new product foreseen to be developed. Details are subject to change without notice
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