鈻?/div>
Figure 1: Package
R
DS(on)
< 0.0055
惟
I
D
20 A (2)
V
DSS
30 V
TYPICAL R
DS
(on) = 0.0045
惟
@ 10V
IMPROVED DIE-TO-FOOTPRINT RATIO
VERY LOW PROFILE PACKAGE (1mm MAX)
VERY LOW THERMAL RESISTANCE
CONDUCTION LOSSES REDUCED
SWITCHING LOSSES REDUCED
PowerFLAT鈩? 6x5 )
DESCRIPTION
The STL80NF3LL utilizes the second generation
of STMicroelectronics unique 鈥淪ingle Feature
Size
鈩⑩€?/div>
strip-based process. The resulting tran-
sistor shows the best trade-off between on-resis-
tance and gate charge. Such features make it the
best choice in high efficiency DC-DC converters
for Telecom and Computer industries. The Chip-
scaled PowerFLAT鈩?package allows a significant
board space saving, still boosting the perfor-
mance.
Figure 2: Internal Schematic Diagram
APPLICATIONS
HIGH-EFFICIENCY DC-DC CONVERTERS
鈻?/div>
SYNCHRONOUS RECTIFICATION
鈻?/div>
TOP VIEW
Table 2: Order Codes
Part Number
STL80NF3LL
Marking
L80NF3LL
Package
PowerFLAT鈩?(6x5)
Packaging
TAPE & REEL
Rev. 3
June 2005
This is a preliminary information on a new product now in development. Details are subjet to change without notice
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