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STL35NF3LL Datasheet

  • STL35NF3LL

  • N-CHANNEL 30V - 0.0055ohm - 35A PowerFLAT⑩ LOW GATE CHARGE ...

  • 6頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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STL35NF3LL
N-CHANNEL 30V - 0.0055鈩?- 35A PowerFLAT鈩?/div>
LOW GATE CHARGE STripFET鈩?MOSFET
TARGET DATA
TYPE
STL35NF3LL
s
s
s
V
DSS
30 V
R
DS(on)
< 0.007
鈩?/div>
I
D
35 A
TYPICAL R
DS
(on) = 0.0055鈩?/div>
IMPROVED DIE-TO-FOOTPRINT RATIO
VERY LOW PROFILE PACKAGE
DESCRIPTION
This Power MOSFET is the second generation of
STMicroelectronics unique 鈥淪TripFET鈩⑩€?technolo-
gy. The resulting transistor shows extremely low on-
resistance and minimal gate charge. The new Pow-
erFLAT鈩?package allows a significant reduction in
board space without compromising performance.
PowerFLAT鈩?6x5)
(Chip Scale Package)
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s
DC-DC CONVERTERS
s
BATTERY MANAGEMENT IN NOMADIC
EQUIPMENT
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
(#)
I
DM
(
q
)
P
TOT
dv/dt(1)
E
AS
(2)
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k鈩?
Gate- source Voltage
Drain Current (continuos) at T
C
= 25擄C
Drain Current (continuos) at T
C
= 100擄C
Drain Current (pulsed)
Total Dissipation at T
C
= 25擄C
Derating Factor
Peak Diode Recovery voltage slope
Single Pulse Avalanche Energy
Storage Temperature
Max. Operating Junction Temperature
Value
30
30
鹵 15
35
22
140
80
0.64
TBD
TBD
鈥?5 to 150
(1)I
SD
<35A, di/dt<300A/碌s, V
DD
<V
(BR)DSS
, T
J
<T
JMAX
(2) Starting T
j
= 25擄C, I
D
= 30A, V
DD
= 27.5V
Unit
V
V
V
A
A
A
W
W/擄C
V/ns
J
擄C
(
q
) Pulse width limited by safe operating area
(#) Limited by Wire Bonding
October 2001
1/6

STL35NF3LL 產品屬性

  • STMicroelectronics

  • MOSFET

  • N-Channel

  • 30 V

  • +/- 15 V

  • 35 A

  • 0.007 Ohms

  • Single Quad Drain Triple Source

  • + 150 C

  • SMD/SMT

  • PowerFLAT

  • Reel

  • - 55 C

  • 80 W

  • 3000

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