鈩?/div>
TYPICAL R
DS
(on) = 0.0032鈩?@ 10V
IMPROVED DIE-TO-FOOTPRINT RATIO
VERY LOW PROFILE PACKAGE (1mm MAX)
VERY LOW THERMAL RESISTANCE
CONDUCTION LOSSES REDUCED
SWITCHING LOSSES REDUCED
PowerFLAT (6x5)
DESCRIPTION
The STL100NH3LL utilizes the latest advanced
design rules of ST鈥檚 proprietary STripFET鈩?Tech-
nology. This process complete to unique metalliza-
tion technique realised the most advanced low
voltage MOSFET in PowerFLAT(6x5). The Chip-
scaled PowerFLAT鈩?package allows a significant
board space saving, still boosting the perfor-
mance.
Figure 2: Internal Schematic Diagram
APPLICATIONS
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HIGH-EFFICIENCY DC-DC CONVERTERS
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SYNCHRONOUS RECTIFICATION
Table 2: Order Codes
SALES TYPE
STL100NH3LL
MARKING
L100NH3LL
PACKAGE
PowerFLAT鈩? 6x5 )
PACKAGING
TAPE & REEL
Rev. 4
October 2005
This is a preliminary information on a new product now in development. Details are subjet to change without notice
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