= 5.5 m鈩?/div>
100% AVALANCHE TESTED
LOW INTRINSIC CAPACITANCE
GATE CHARGE MINIMIZED
REDUCED VOLTAGE SPREAD
INDUSTRIAL APPLICATIONS:
s
SMPS & UPS
s
MOTOR CONTROL
s
WELDING EQUIPMENT
s
OUTPUT STAGE FOR PWM, ULTRASONIC
CIRCUITS
ISOTOP
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symb ol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(鈥?
P
tot
V
ISO
T
s tg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain- gate Voltage (R
GS
= 20 k鈩?
G ate-source Voltage
Drain Current (continuous) at T
c
= 25
o
C
Drain Current (continuous) at T
c
= 100 C
Drain Current (pulsed)
T otal Dissipation at T
c
= 25
o
C
Derating Factor
Insulation Withstand Voltage (AC-RMS)
Storage T emperature
Max. Operating Junction Temperature
o
Value
100
100
鹵
20
180
119
540
450
3.6
2500
-55 to 150
150
(
1
) I
SD
鈮?80 螒,
di/d蟿
鈮?/div>
200 A/碌s, V
DD
鈮?/div>
V
(BR)DSS
, T
j
鈮?/div>
T
JMAX
Un it
V
V
V
A
A
A
W
W /
o
C
V
o
o
C
C
1/8
(鈥? Pulse width limited by safe operating area
February 1999
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