Using the latest high voltage MESH OVERLAY鈩?/div>
process, STMicroelectronics has designed an ad-
vanced family of power MOSFETs with outstanding
performance. The new patented STrip layout cou-
pled with the Company鈥檚 proprietary edge termina-
tion structure, makes it suitable in coverters for
lighting applications.
DPAK
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s
HIGH CURRENT, HIGH SPEED SWITCHING
s
SWITH MODE POWER SUPPLIES (SMPS)
s
DC-DC CONVERTERS FOR TELECOM,
INDUSTRIAL, AND LIGHTING EQUIPMENT
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(
q
)
P
TOT
dv/dt (1)
E
AS
(2)
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k鈩?
Gate- source Voltage
Drain Current (continuos) at T
C
= 25擄C
Drain Current (continuos) at T
C
= 100擄C
Drain Current (pulsed)
Total Dissipation at T
C
= 25擄C
Derating Factor
Peak Diode Recovery voltage slope
Single Pulse Avalanche Energy
Storage Temperature
Max. Operating Junction Temperature
Value
250
250
鹵 20
8
5
32
80
0.64
5
209
鈥?5 to 150
150
Unit
V
V
V
A
A
A
W
W/擄C
V/ns
mJ
擄C
擄C
(鈥?Pulse width limited by safe operating area
(1) I
SD
鈮?/div>
8A, di/dt鈮?00 A/碌s, V
DD
鈮?/div>
V
(BR)DSS
, Tj鈮
jMAX
(2) Starting T
j
= 25擄C, I
AR
= 50A, V
DD
=20 V
July 2001
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