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STD60NF3LL Datasheet

  • STD60NF3LL

  • N-CHANNEL 30V - 0.0075ohm - 60A DPAK STripFET⑩ II POWER MOS...

  • 9頁(yè)

  • STMICROELECTRONICS   STMICROELECTRONICS

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STD60NF3LL
N-CHANNEL 30V - 0.0075鈩?- 60A DPAK
STripFET鈩?II POWER MOSFET
TYPE
STD60NF3LL
s
s
s
s
s
V
DSS
30V
R
DS(on)
<0.0095鈩?/div>
I
D
60A
TYPICAL R
DS
(on) = 0.0075鈩?/div>
OPTIMAL RDS(ON) x Qg TRADE-OFF @ 4.5V
CONDUCTION LOSSES REDUCED
SWITCHING LOSSES REDUCED
ADD SUFFIX 鈥淭4鈥?FOR ORDERING IN TAPE &
REEL
3
1
DPAK
TO-252
DESCRIPTION
This application specific Power Mosfet is the third
genaration of STMicroelectronics unique 鈥淪ingle
Feature Size
鈩⑩€?/div>
strip-based process. The result-
ing transistor shows the best trade-off between on-
resistance ang gate charge. When used as high
and low side in buck regulators, it gives the best
performance in terms of both conduction and
switching losses. This is extremely important for
motherboards where fast switching and high effi-
ciency are of paramount importance.
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s
SPECIFICALLY DESIGNED AND OPTIMISED
FOR HIGH EFFICIENCY DC/DC
CONVERTERS
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(
l
)
P
TOT
E
AS
(1)
T
stg
T
j
April 2002
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k鈩?
Gate- source Voltage
Drain Current (continuos) at T
C
= 25擄C
Drain Current (continuos) at T
C
= 100擄C
Drain Current (pulsed)
Total Dissipation at T
C
= 25擄C
Derating Factor
Single Pulse Avalanche Energy
Storage Temperature
Operating Junction Temperature
Value
30
30
鹵 16
60
43
240
100
0.67
700
鈥?55 to 175
(1) Starting T
j
=25擄C, I
D
=30A, V
DD
=27.5V
Unit
V
V
V
A
A
A
W
W/擄C
mJ
擄C
(
q
) Pulse width limited by safe operating area
1/9

STD60NF3LL 產(chǎn)品屬性

  • 36.5 ns

  • 22 ns

  • 30 nC V @ 4.5

  • 2210 pF V @ 25

  • 表面貼裝

  • 6.2mm

  • DPAK

  • 6.6 x 6.2 x 2.4mm

  • 3

  • -55 °C

  • 100000 mW

  • ±16 V

  • 30 V

  • 0.01

  • 60 A

  • +175 °C

  • 1

  • 功率 MOSFET

  • 增強(qiáng)

  • N

  • 單

  • 6.6mm

  • 2.4mm

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