(on) = 0.014鈩?/div>
EXCEPTIONAL dv/dt CAPABILITY
100% AVALANCHE TESTED
APPLICATION ORIENTED
CHARACTERIZATION
3
1
DPAK
(Suffix 鈥淭4鈥?
DESCRIPTION
This Power Mosfet series realized with STMicro-
electronics unique STripFET process has specifical-
ly been designed to minimize input capacitance and
gate charge. It is therefore suitable as primary
switch in advanced high-efficiency isolated DC-DC
converters for Telecom and Computer application. It
is also intended for any application with low gate
charge drive requirements.
APPLICATIONS
s
HIGH-EFFICIENCY DC-DC CONVERTERS
s
UPS AND MOTOR CONTROL
s
AUTOMOTIVE
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(
l
)
P
TOT
dv/dt (1)
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k鈩?
Gate- source Voltage
Drain Current (continuous) at T
C
= 25擄C
Drain Current (continuous) at T
C
= 100擄C
Drain Current (pulsed)
Total Dissipation at T
C
= 25擄C
Derating Factor
Peak Diode Recovery voltage slope
Storage Temperature
Operating Junction Temperature
Value
60
60
鹵 20
60
42
240
110
0.73
4
鈥?55 to 175
(1) I
SD
鈮?/div>
60A, di/dt鈮?00 A/碌s, V
DD
鈮?/div>
24V, Tj鈮
jMAX
Unit
V
V
V
A
A
A
W
W/擄C
V/ns
擄C
(
q
) Pulse width limited by safe operating area
October 2002
1/9
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