Using the latest high voltage MESH OVERLAY鈩?/div>
process, STMicroelectronics has designed an
advanced family of power MOSFETs with
outstanding performances. The new patent
pending strip layout coupled with the Company鈥檚
proprietary edge termination structure, gives the
lowest R
DS(on)
per area, exceptional avalanche
and dv/dt capabilities and unrivalled gate charge
and switching characteristics.
APPLICATIONS
s
SWITCH MODE POWER SUPPLIES (SMPS)
s
DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
DPAK
TO-252
(Suffix 鈥漈4鈥?
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(鈥?
P
tot
Parameter
Drain-source Voltage (V
GS
= 0)
Drain- gate Voltage (R
GS
= 20 k
鈩?/div>
)
G ate-source Voltage
Drain Current (continuous) at T
c
= 25 C
Drain Current (continuous) at T
c
= 100 C
Drain Current (pulsed)
T otal Dissipation at T
c
= 25 C
Derating Factor
dv/dt(
1
)
T
s tg
T
j
Peak Diode Recovery voltage slope
Storage Temperature
Max. Operating Junction Temperature
o
o
o
Value
300
300
鹵
30
5
3
20
55
0.44
5.5
-65 to 150
150
(
1
) I
SD
鈮?5螒, 未喂/未蟿 鈮?/div>
200 A/碌s, V
DD
鈮?/div>
V
(BR)DSS
, Tj
鈮?/div>
T
JMAX
Un it
V
V
V
A
A
A
W
W /
o
C
V/ns
o
o
C
C
1/9
(鈥? Pulse width limited by safe operating area
August 1999
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