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STD4NS25 Datasheet

  • STD4NS25

  • N-CHANNEL 250V - 0.9ohm - 4A DPAK/IPAK MESH OVERLAY⑩ MOSFET

  • 9頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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上傳產品規(guī)格書

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STD4NS25
N-CHANNEL 250V - 0.9鈩?- 4A DPAK/IPAK
MESH OVERLAY鈩?MOSFET
TYPE
STD4NS25
s
s
s
s
V
DSS
250 V
R
DS(on)
< 1.1
鈩?/div>
I
D
4A
TYPICAL R
DS
(on) = 0.9
鈩?/div>
EXTREMELY HIGH dv/dt CAPABILITY
100% AVALANCHE TESTED
ADD SUFFIX 鈥淭4鈥?FOR ORDERING IN TAPE &
REEL
3
1
DPAK
TO-252
IPAK
TO-251
1
3
2
DESCRIPTION
Using the latest high voltage MESH OVERLAY鈩?/div>
process, STMicroelectronics has designed an ad-
vanced family of power MOSFETs with outstanding
performance. The new patented STrip layout cou-
pled with the Company鈥檚 proprietary edge termina-
tion structure, makes it suitable in coverters for
lighting applications.
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s
HIGH CURRENT, HIGH SPEED SWITCHING
s
SWITH MODE POWER SUPPLIES (SMPS)
s
DC-DC CONVERTERS FOR TELECOM,
INDUSTRIAL, AND LIGHTING EQUIPMENT
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(
q
)
P
TOT
dv/dt (1)
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k鈩?
Gate- source Voltage
Drain Current (continuos) at T
C
= 25擄C
Drain Current (continuos) at T
C
= 100擄C
Drain Current (pulsed)
Total Dissipation at T
C
= 25擄C
Derating Factor
Peak Diode Recovery voltage slope
Storage Temperature
Max. Operating Junction Temperature
Value
250
250
鹵 20
4
2.5
16
50
0.4
5
鈥?5 to 150
150
(1) I
SD
鈮?/div>
4A, di/dt鈮?00 A/碌s, V
DD
鈮?/div>
V
(BR)DSS
, Tj鈮
jMAX
Unit
V
V
V
A
A
A
W
W/擄C
V/ns
擄C
擄C
(鈥?Pulse width limited by safe operating area
February 2001
1/9

STD4NS25 產品屬性

  • 12 ns

  • 19 nC V @ 10

  • 355 pF V @ 25

  • 表面貼裝

  • 6.2mm

  • DPAK

  • 6.6 x 6.2 x 2.4mm

  • 3

  • -65 °C

  • 50000 mW

  • ±20 V

  • 250 V

  • 1.1

  • 4 A

  • +150 °C

  • 1

  • 功率 MOSFET

  • 增強

  • N

  • 單

  • 6.6mm

  • 2.4mm

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