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STD40NF06LZ Datasheet

  • STD40NF06LZ

  • N-CHANNEL 60V - 0.020 ohm - 40A DPAK Zener-Protected STripFE...

  • 8頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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N-CHANNEL 60V - 0.020
鈩?/div>
- 40A DPAK
Zener-Protected STripFET鈩?II POWER MOSFET
TYPE
STD40NF06LZ
s
s
s
s
s
STD40NF06LZ
V
DSS
60 V
R
DS(on)
< 25 m鈩?/div>
I
D
40 A
s
TYPICAL R
DS
(on) = 0.020鈩?/div>
100% AVALANCHE TESTED
LOW GATE CHARGE
LOGIC LEVEL GATE DRIVE
SURFACE-MOUNTING DPAK (TO-252)
POWER PACKAGE IN TAPE & REEL
(SUFFIX 鈥淭4")
BUILT-IN ZENER DIODES TO IMPROVE ESD
PROTECTION UP TO 2kV
3
1
DPAK
TO-252
(Suffix 鈥淭4鈥?
DESCRIPTION
This Power MOSFET is the latest development of
STMicroelectronis unique "Single Feature Size鈩?quot;
strip-based process. The resulting transistor
shows extremely high packing density for low on-
resistance, rugged avalanche characteristics and
less critical alignment steps therefore a
remarkable manufacturing reproducibility.
APPLICATIONS
s
SINGLE-ENDED SMPS IN MONITOTS,
COMPUTER AND INDUSTRIAL
APPLICATION
s
WELDING EQUIPMENT
s
AUTOMOTIVE
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(鈥?
P
tot
V
ESD(G-S)
dv/dt
(1)
E
AS(2)
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k鈩?
Gate- source Voltage
Drain Current (continuous) at T
C
= 25擄C
Drain Current (continuous) at T
C
= 100擄C
Drain Current (pulsed)
Total Dissipation at T
C
= 25擄C
Derating Factor
Gate-source ESD(HBM-C=100pF, R=15k鈩?
Peak Diode Recovery voltage slope
Single Pulse Avalanche Energy
Storage Temperature
Max. Operating Junction Temperature
INTERNAL SCHEMATIC DIAGRAM
Value
60
60
鹵 16
40
28
160
100
0.67
鹵 2.5
9
450
-55 to 175
(1)
I
SD
鈮?0A,
di/dt
鈮?00A/碌s,
V
DD
鈮?/div>
V
(BR)DSS
, T
j
鈮?/div>
T
JMAX
.
(2)
Starting T
j
= 25
o
C I
D
= 20A
V
DD
= 45V
Unit
V
V
V
A
A
A
W
W/擄C
kV
V/ns
mJ
擄C
(鈥?
Pulse width limited by safe operating area.
October 2002
.
1/8

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