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STD3NB30T4 Datasheet

  • STD3NB30T4

  • TRANSISTOR | MOSFET | N-CHANNEL | 300V V(BR)DSS | 3.2A I(D) ...

  • 9頁

  • ETC

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STD3NB30
N-CHANNEL 300V - 1.8鈩?- 3.2A DPAK
PowerMesh鈩?MOSFET
TYPE
STD3NB30
s
s
s
s
s
s
V
DSS
300 V
R
DS(on)
< 2鈩?/div>
I
D
3.2 A
TYPICAL R
DS
(on) = 1.8鈩?/div>
EXTREMELY HIGH dv/dt CAPABILITY
100% AVALANCHE TESTED
VERY LOW INTRINSIC CAPACITANCES
GATE CHARGE MINIMIZED
ADD SUFFIX 鈥淭4鈥?FOR ORDERING IN TAPE &
REEL
3
1
DPAK
DESCRIPTION
Using the latest high voltage MESH OVERLAY鈩?/div>
process, STMicroelectronics has designed an ad-
vanced family of power MOSFETs with outstanding
performances. The new patent pending strip layout
coupled with the Company鈥檚 proprieraty edge termi-
nation structure, gives the lowest RDS(on) per area,
exceptional avalanche and dv/dt capabilities and
unrivalled gate charge and switching characteris-
tics.
APPLICATIONS
s
SWITH MODE POWER SUPPLIES (SMPS)
s
DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVERS
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(
q
)
P
TOT
dv/dt(1)
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k鈩?
Gate- source Voltage
Drain Current (continuos) at T
C
= 25擄C
Drain Current (continuos) at T
C
= 100擄C
Drain Current (pulsed)
Total Dissipation at T
C
= 25擄C
Derating Factor
Peak Diode Recovery voltage slope
Storage Temperature
Max. Operating Junction Temperature
Value
300
300
鹵30
3.2
2
12.8
45
0.36
4
鈥?5 to 150
150
Unit
V
V
V
A
A
A
W
W/擄C
V/ns
擄C
擄C
(鈥?Pulse width limited by safe operating area
(1)I
SD
鈮?.2A,
di/dt
鈮?00A/碌s,
V
DD
鈮?/div>
V
(BR)DSS
, T
j
鈮?/div>
T
JMAX.
May 2001
1/9

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