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STD3NA50 Datasheet

  • STD3NA50

  • N - CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTOR

  • 10頁(yè)

  • STMICROELECTRONICS   STMICROELECTRONICS

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STD3NA50
N - CHANNEL ENHANCEMENT MODE
POWER MOS TRANSISTOR
TYPE
STD3NA50
s
s
s
s
s
V
DSS
500 V
R
DS( on)
< 3
鈩?/div>
I
D
2.7 A
s
s
TYPICAL R
DS(on)
= 2.4
鈩?/div>
AVALANCHE RUGGED TECHNOLOGY
100% AVALANCHE TESTED
REPETITIVE AVALANCHE DATA AT 100
o
C
APPLICATION ORIENTED
CHARACTERIZATION
THROUGH-HOLE IPAK (TO-251) POWER
PACKAGE IN TUBE (SUFFIX 鈥?1鈥?
SURFACE-MOUNTING DPAK (TO-252)
POWER PACKAGE IN TAPE & REEL
(SUFFIX 鈥漈4鈥?
3
1
IPAK
TO-251
(Suffix 鈥?1鈥?
2
1
DPAK
TO-252
3
(Suffix 鈥漈4鈥?
APPLICATIONS
s
HIGH SPEED SWITCHING
s
UNINTERRUPTIBLE POWER SUPPLY (UPS)
s
MOTOR CONTROL, AUDIO AMPLIFIERS
s
INDUSTRIAL ACTUATORS
s
DC-DC & DC-AC CONVERTERS FOR
TELECOM, INDUSTRIAL AND CONSUMER
ENVIRONMENT
s
PARTICULARLY SUITABLE FOR
ELECTRONIC FLUORESCENT LAMP
BALLASTS
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
V
D S
V
DG R
V
GS
I
D
I
D
I
D M
(鈥?
P
tot
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain- gate Voltage (R
GS
= 20 k鈩?
Gate-source Voltage
Drain Current (continuous) at T
c
= 25
o
C
Drain Current (continuous) at T
c
= 100 C
Drain Current (pulsed)
Total Dissipation at T
c
= 25
o
C
Derating Factor
Storage Temperature
Max. Operating Junction Temperature
o
Value
500
500
鹵
30
2.7
1.7
10.8
50
0.4
-65 to 150
150
Unit
V
V
V
A
A
A
W
W/
o
C
o
o
C
C
(鈥? Pulse width limited by safe operating area
November 1996
1/10

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