鈩?/div>
process has specifically been de-
signed to minimize input capacitance and gate charge.
It is therefore suitable as primary switch in advanced
high-efficiency, high-frequency isolated DC-DC con-
verters for Telecom and Computer applications. It is
also intended for any applications with low gate drive
requirements.
DPAK
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
DC-DC & DC-AC CONVERTERS
s
DC MOTOR CONTROL
s
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(
l
)
P
TOT
dv/dt (1)
E
AS
(2)
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k鈩?
Gate- source Voltage
Drain Current (continuos) at T
C
= 25擄C
Drain Current (continuos) at T
C
= 100擄C
Drain Current (pulsed)
Total Dissipation at T
C
= 25擄C
Derating Factor
Peak Diode Recovery voltage slope
Single Pulse Avalanche Energy
Storage Temperature
Max. Operating Junction Temperature
Value
60
60
鹵 15
10
7
40
30
0.2
30
50
鈥?55 to 175
(1) I
SD
鈮?0A,
di/dt
鈮?00A/碌s,
V
DD
=48V, T
j
鈮?/div>
T
JMAX.
(2) Starting T
j
= 25擄C, I
d
= 7A, V
DD
=20 V
Unit
V
V
V
A
A
A
W
W/擄C
V/ns
mJ
擄C
(
q
) Pulse width limited by safe operating area
November 2001
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
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