鈩?/div>
EXTREMELY HIGHT dv/dt CAPABILITY
100% AVALANCHE TESTED
REPETITIVE AVALANCHE DATA AT 100
o
C
VERY LOW INTRINSIC CAPACITANCE
GATE CHARGE MINIMIZED
LOW LEAKAGE CURRENT
APPLICATION ORIENTED
FOR THROUGH-HOLE VERSION CONTACT
SALES OFFICE
3
1
D
2
PAK
TO-263
(suffix鈥淭4鈥?
DESCRIPTION
This Power Mosfet is the latest development of
STMicroelectronis unique 鈥漇ingle Feature Size鈩?鈥?strip-
based process. The resulting transistor shows extremely
high packing density for low on-resistance, rugged
avalanche characteristics and less critical alignment
steps
therefore
a
remarkable
manufacturing
reproducibility.
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s
HIGH CURRENT, HIGH SPEED SWITCHING
s
SWITCH MODE POWER SUPPLY (SMPS)
s
DC-AC CONVERTER FOR WELDING
EQUIPMENT AND UNINTERRUPTABLE
POWER SUPPLY (UPS)
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(鈥?
P
tot
dv/dt
(2)
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k鈩?
Gate- source Voltage
Drain Current (continuos) at T
C
= 25擄C
Drain Current (continuos) at T
C
= 100擄C
Drain Current (pulsed)
Total Dissipation at T
C
= 25擄C
Derating Factor
Peak Diode Recovery voltage slope
Storage Temperature
Value
500
500
鹵
30
8.6
5.4
34.4
125
1.0
4.5
鈥?0 to 150
150
(2) I
SD
鈮?A,
di/dt
鈮?00A/碌s,
V
DD
鈮?/div>
V
(BR)DSS
, T
j
鈮?/div>
T
JMAX.
Unit
V
V
V
A
A
A
W
W/擄C
V/ns
擄C
擄C
(
鈥?/div>
)Pulse width limited by safe operating area.
November 2000
1/8
next