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STB90NF3LL Datasheet

  • STB90NF3LL

  • N-CHANNEL 30V - 0.0048 ohm - 80A D2PAK LOW GATE CHARGE STrip...

  • 7頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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N-CHANNEL 30V - 0.0048
鈩?/div>
- 80A D
2
PAK
LOW GATE CHARGE STripFET鈩?II POWER MOSFET
PRELIMINARY DATA
TYPE
STB90NF3LL
s
s
s
s
s
STB90NF3LL
V
DSS
30 V
R
DS(on)
< 0.0055
鈩?/div>
I
D
80 A(#)
TYPICAL R
DS
(on) = 0.0048
鈩?/div>
@ 10 V
OPTIMAL R
DS(on)
x Qg TRADE-OFF @ 4.5 V
CONDUCTION LOSSES REDUCED
SWITCHING LOSSES REDUCED
SURFACE-MOUNTING D
2
PAK (TO-263)
POWER PACKAGE IN TUBE (NO SUFFIX) OR
IN TAPE & REEL (SUFFIX 鈥淭4鈥?
3
1
DESCRIPTION
This application specific Power MOSFET is the third
genaration of STMicroelectronis unique "Single Feature
Size鈩?quot; strip-based process. The resulting transistor
shows the best trade-off between on-resistance and gate
charge. When used as high and low side in buck
regulators, it gives the best performance in terms of both
conduction and switching losses. This is extremely
important for motherboards where fast switching and
high efficiency are of paramount importance.
D
2
PAK
TO-263
(Suffix 鈥淭4鈥?
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s
SPECIFICALLY DESIGNED AND OPTIMISED
FOR HIGH EFFICIENCY CPU CORE DC/DC
CONVERTERS
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
(#)
I
D
I
DM
(鈥?
P
tot
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k鈩?
Gate- source Voltage
Drain Current (continuous) at T
C
= 25擄C
Drain Current (continuous) at T
C
= 100擄C
Drain Current (pulsed)
Total Dissipation at T
C
= 25擄C
Derating Factor
Storage Temperature
Max. Operating Junction Temperature
Value
30
30
鹵 16
80
80
320
200
1.3
-55 to 175
(#) Value limited by wire bonding
1/7
Unit
V
V
V
A
A
A
W
W/擄C
擄C
(
鈥?
Pulse width limited by safe operating area.
September 2002
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

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