鈥?/div>
strip-based process. The resulting tran-
sistor shows extremely high packing density for
low on-resistance, rugged avalance characteris-
tics and less critical alignment steps therefore a re-
markable manufacturing reproducibility.
D
2
PAK
(TO-263)
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s
SOLENOID AND RELAY DRIVERS
s
MOTOR CONTROL, AUDIO AMPLIFIERS
s
DC-DC CONVERTERS
s
AUTOMOTIVE ENVIRONMENT
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
(1)
I
D
I
DM
(
q
)
P
TOT
dv/dt(2)
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k鈩?
Gate- source Voltage
Drain Current (continuos) at T
C
= 25擄C
Drain Current (continuos) at T
C
= 100擄C
Drain Current (pulsed)
Total Dissipation at T
C
= 25擄C
Derating Factor
Peak Diode Recovery voltage slope
Storage Temperature
Max. Operating Junction Temperature
Value
55
55
鹵20
80
80
320
300
2
7
鈥?5 to 175
175
(1) Current Limited by Package
(2) I
SD
鈮?/div>
80A, di/dt鈮?00 A/碌s, V
DD
鈮?/div>
V
(BR)DSS
, Tj鈮
jMAX
Unit
V
V
V
A
A
A
W
W/擄C
V/ns
擄C
擄C
(
q
) Pulse width limi ted by safe operating area
October 2001
1/9
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