<0.01鈩?/div>
V
RRM
30V
I
D
70A
V
F(M AX)
0.51V
3
1
D
2
PAK
TO-263
(suffix 鈥漈4鈥?
DESCRIPTION:
This product associates a Power MOSFET of the
third generation of ST Microelectronics unique
鈥漇ingle Feature Size鈥?strip-based process and a
low drop Schottky diode. The transistor shows the
best trade-off between on-resistance and gate
charge. Used as low side in buck regulators, the
product is the best solution in terms of conduction
losses and space saving.
INTERNAL SCHEMATIC DIAGRAM
MOSFET ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(鈥?
P
t ot
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain- gate Voltage (R
GS
= 20 k鈩?
Gate-source Voltage
Drain Current (continuous) at T
c
= 25
o
C
Drain Current (continuous) at T
c
= 100
o
C
Drain Current (pulsed)
Total Dissipation at T
c
= 25 C
Derating Factor
Storage Temperature
Max. Operating Junct ion Temperature
o
Valu e
30
30
鹵
22
70
50
280
100
0.67
-65 to 175
175
Unit
V
V
V
A
A
A
W
W/
o
C
o
o
C
C
(鈥? Pulse width limited by safe operating area
SCHOTTKY ABSOLUTE MAXIMUM RATINGS
Symb ol
V
RRM
I
F(RMS)
I
F (AV)
I
FSM
dv/dt
April 2000
Parameter
Repetitive Peak Reverse Voltage
RMS F orward Current
Average F orward Current
Surge Non Repetitive F orward Current
Critical Rate Of Rise O f Reverse Voltage
T
L
=125 C
未
=0.5
tp= 10 ms
Sinusoidal
o
Valu e
30
20
3
75
10000
Un it
V
A
A
A
V/碌s
1/6