鈩?/div>
AVALANCHE RUGGED TECHNOLOGY
100% AVALANCHE TESTED
REPETETIVE AVALANCHE DATA AT 100
o
C
LOW GATE CHARGE
HIGH CURRENT CAPABILITY
175
o
C OPERATING TEMPERATURE
APPLICATION ORIENTED
CHARACTERIZATION
ADD SUFFIX 鈥淭4鈥?FOR ORDERING IN TAPE &
REEL
3
1
D
2
PAK
TO-263
(suffix鈥淭4鈥?
DESCRIPTION
This Power MOSFET is the latest development of
STMicroelectronics unique 鈥淪ingle Feature Size鈩⑩€?strip-
based process. The resulting transistor shows extremely
high packing density for low on-resistance, rugged
avalanche characteristics and less critical alignment
steps
therefore
a
remarkable
manufacturing
reproducibility.
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s
HIGH CURRENT, HIGH SPEED SWITCHING
s
SOLENOID AND RELAY DRIVERS
s
DC-DC & DC-AC CONVERTERS
s
AUTOMOTIVE ENVIRONMENT
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(鈥?
P
tot
dv/dt
(1)
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k鈩?
Gate- source Voltage
Drain Current (continuos) at T
C
= 25擄C
Drain Current (continuos) at T
C
= 100擄C
Drain Current (pulsed)
Total Dissipation at T
C
= 25擄C
Derating Factor
Peak Diode Recovery voltage slope
Storage Temperature
Max. Operating Junction Temperature
Value
30
30
鹵20
60
42
240
100
0.67
7
鈥?5 to 175
175
Unit
V
V
V
A
A
A
W
W/擄C
V/ns
擄C
擄C
(鈥?Pulse width limited by safe operating area
(1)I
SD
[
60 A, di/dt
m300A/ms,
V
DD
[
V
(BR)DSS
, Tj
[
T
JMA
November 2000
This is preliminary data new product in development or undergoing evaluation. Details are subject to change without notice.
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