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STB5NA80 Datasheet

  • STB5NA80

  • N - CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTOR

  • 10頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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STB5NA80
N - CHANNEL ENHANCEMENT MODE
POWER MOS TRANSISTOR
PRELIMINARY DATA
TYPE
ST B5NA80
s
s
s
s
s
s
s
V
DSS
800 V
R
DS(on)
< 2.4
鈩?/div>
I
D
4.7 A
s
s
TYPICAL R
DS(on)
= 1.8
鈩?/div>
AVALANCHE RUGGED TECHNOLOGY
100% AVALANCHE TESTED
REPETITIVE AVALANCHE DATA AT 100
o
C
LOW GATE CHARGE
VERY HIGH CURRENT CAPABILITY
APPLICATION ORIENTED
CHARACTERIZATION
THROUGH-HOLE I2PAK (TO-262) POWER
PACKAGE IN TUBE (SUFFIX 鈥?1鈥?
SURFACE-MOUNTING D2PACK (TO-263)
POWER PACKAGE IN TUBE (NO SUFFIX)
OR IN TAPE & REEL (SUFFIX 鈥漈4鈥?
3
12
3
1
I2PAK
TO-262
D2PAK
TO-263
APPLICATIONS
s
HIGH CURRENT, HIGH SPEED SWITCHING
s
SOLENOID AND RELAY DRIVERS
s
REGULATORS
s
DC-DC & DC-AC CONVERTERS
s
MOTOR CONTROL, AUDIO AMPLIFIERS
s
AUTOMOTIVE ENVIRONMENT (INJECTION,
ABS, AIR-BAG, LAMPDRIVERS, Etc.)
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(鈥?
P
t ot
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain- gate Voltage (R
GS
= 20 k鈩?
Gate-source Voltage
Drain Current (continuous) at T
c
= 25
o
C
Drain Current (continuous) at T
c
= 100 C
Drain Current (pulsed)
Total Dissipation at T
c
= 25
o
C
Derating Factor
St orage Temperature
Max. Operating Junction Temperature
o
Value
800
800
鹵
30
4.7
3
19
125
1
-65 to 150
150
Uni t
V
V
V
A
A
A
W
W/
o
C
o
o
C
C
(鈥? Pulse width limited by safe operating area
March 1996
1/10

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