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STB50NE10L Datasheet

  • STB50NE10L

  • N - CHANNEL 100V - 0.020ohm - 50A - D2PAK STripFET POWER MO...

  • 5頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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廬
STB50NE10L
N - CHANNEL 100V - 0.020鈩?- 50A - D
2
PAK
STripFET鈩?POWER MOSFET
PRELIMINARY DATA
TYPE
STB50NE10L
s
s
s
s
s
V
DSS
100 V
R
DS(on)
<0.025
鈩?/div>
I
D
50 A
s
TYPICAL R
DS(on)
= 0.020
鈩?/div>
EXCEPTIONAL dv/dt CAPABILITY
100% AVALANCHE TESTED
LOW GATE CHARGE AT 100
o
C
APPLICATION ORIENTED
CHARACTERIZATION
FOR THROUGH-HOLE VERSION CONTACT
SALES OFFICE
3
1
DESCRIPTION
This Power MOSFET is the latest development of
STMicroelectronics unique "Single Feature
Size鈩?" strip-based
process. The resulting
transistor shows extremely high packing density
for low on-resistance, rugged avalanche
characteristics and less critical alignment steps
therefore
a
remarkable
manufacturing
reproducibility.
APPLICATIONS
s
HIGH CURRENT, HIGH SPEED SWITCHING
s
SOLENOID AND RELAY DRIVERS
s
MOTOR CONTROL, AUDIO AMPLIFIERS
s
DC-DC & DC-AC CONVERTERS
s
AUTOMOTIVE ENVIRONMENT
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(鈥?
P
tot
Parameter
Drain-source Voltage (V
GS
= 0)
Drain- gate Voltage (R
GS
= 20 k鈩?
Gate-source Voltage
Drain Current (continuous) at T
c
= 25 C
Drain Current (continuous) at T
c
= 100
o
C
Drain Current (pulsed)
Total Dissipation at T
c
= 25
o
C
Derating Factor
dv/dt (
1
) Peak Diode Recovery voltage slope
T
stg
T
j
Storage Temperature
Max. Operating Junction Temperature
o
D
2
PAK
TO-263
(suffix "T4")
INTERNAL SCHEMATIC DIAGRAM
Value
100
100
鹵
20
50
35
200
150
1
6
-65 to 175
175
(
1
) I
SD
鈮?/div>
50 A, di/dt
鈮?/div>
300 A/碌s, V
DD
鈮?/div>
V
(BR)DSS
, T
j
鈮?/div>
T
JMAX
Unit
V
V
V
A
A
A
W
W/
o
C
V/ns
o
o
C
C
(鈥? Pulse width limited by safe operating area
June 1998
1/5

STB50NE10L 產(chǎn)品屬性

  • STMicroelectronics

  • N-Channel

  • 100 V

  • +/- 20 V

  • 50 A

  • 0.24 Ohms

  • Single

  • + 175 C

  • SMD/SMT

  • D2PAK

  • Tube

  • 45 ns

  • - 65 C

  • 150 W

  • 105 ns

  • 50

  • 135 ns

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