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STB24NF10T4 Datasheet

  • STB24NF10T4

  • TRANSISTOR | MOSFET | N-CHANNEL | 100V V(BR)DSS | 26A I(D) |...

  • 163.76KB

  • 10頁

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STP24NF10
STB24NF10
N-CHANNEL 100V - 0.055鈩?- 26A TO-220 / D
2
PAK
LOW GATE CHARGE STripFET鈩?II POWER MOSFET
TYPE
STP24NF10
STB24NF10
s
s
s
s
V
DSS
100 V
100 V
R
DS(on)
< 0.060
鈩?/div>
< 0.060
鈩?/div>
I
D
26 A
26 A
TYPICAL R
DS
(on) = 0.055鈩?/div>
EXCEPTIONAL dv/dt CAPABILITY
100% AVALANCHE TESTED
APPLICATION ORIENTED
CHARACTERIZATION
3
3
1
2
1
TO-220
DESCRIPTION
This Power Mosfet series realized with STMicro-
electronics unique STripFET process has specifical-
ly been designed to minimize input capacitance and
gate charge. It is therefore suitable as primary
switch in advanced high-efficiency isolated DC-DC
converters for Telecom and Computer application. It
is also intended for any application with low gate
charge drive requirements.
D
2
PAK
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s
HIGH-EFFICIENCY DC-DC CONVERTERS
s
UPS AND MOTOR CONTROL
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(
q
)
P
TOT
dv/dt (1)
E
AS
(2)
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k鈩?
Gate- source Voltage
Drain Current (continuos) at T
C
= 25擄C
Drain Current (continuos) at T
C
= 100擄C
Drain Current (pulsed)
Total Dissipation at T
C
= 25擄C
Derating Factor
Peak Diode Recovery voltage slope
Single Pulse Avalanche Energy
Storage Temperature
Operating Junction Temperature
Value
100
100
鹵20
26
18
104
85
0.57
9
220
鈥?55 to 175
(1) I
SD
鈮?4A,
di/dt
鈮?00A/碌s,
V
DD
鈮?/div>
V
(BR)DSS
, T
j
鈮?/div>
T
JMAX.
(2) Starting T
j
= 25擄C, I
D
= 12A, V
DD
= 30V
Unit
V
V
V
A
A
A
W
W/擄C
V/ns
mJ
擄C
(
q
) Pulse width limi ted by safe operating area
April 2002
1/10

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