鈩?/div>
LOW THRESHOLD DRIVE
ULTRA LOW ON-RESISTANCE
LOGIC LEVEL DEVICE
100% AVALANCHE TESTED
SURFACE-MOUNTING D
2
PAK (TO-263)
POWER PACKAGE IN TUBE (NO SUFFIX) OR
IN TAPE & REEL (SUFFIX 鈥淭4鈥?
3
1
D
2
PAK
TO-263
(Suffix 鈥淭4鈥?
DESCRIPTION
This Power MOSFET is the latest development of
STMicroelectronis unique "Single Feature Size鈩?quot;
strip-based process. The resulting transistor
shows extremely high packing density for low on-
resistance, rugged avalanche characteristics and
less critical alignment steps therefore a remark-
able manufacturing reproducibility.
APPLICATIONS
s
HIGH CURRENT, HIGH SWITCHING SPEED
s
MOTOR CONTROL, AUDIO AMPLIFIERS
s
DC-DC & DC-AC CONVERTERS
s
SOLENOID AND RELAY DRIVERS
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
(
鈭?/div>
)
I
D
I
DM
(鈥?
P
tot
E
AS
(1)
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k鈩?
Gate- source Voltage
Value
30
30
鹵 15
160
160
640
300
2
1.2
-55 to 175
(1) Starting T
j
= 25
o
C, I
D
= 80A, V
DD
= 20V
Unit
V
V
V
A
A
A
W
W/擄C
J
擄C
Drain Current (continuous) at T
C
= 25擄C
Drain Current (continuous) at T
C
= 100擄C
Drain Current (pulsed)
Total Dissipation at T
C
= 25擄C
Derating Factor
Single Pulse Avalanche Energy
Storage Temperature
Max. Operating Junction Temperature
(鈥? Pulse width limited by safe operating area.
(*) Current Limited by Package
May 2002
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
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